The preferred embodiments relate to electronic circuits and more particularly circuits wherein a calibrated measure is performed.
In certain electronic circuits, a measure of voltage is a response to some factor being sensed or determined in connection with the circuit. Such a measure sometimes occurs in various sensors, and one common example used in this document is a resistance temperature detector (RTD). An RTD sensor/circuit includes a temperature-dependent resistor, whereby a voltage across a temperature-dependent resistor is measured and corresponds to its resistance, so that resistance further corresponds to the then-existing temperature to which the resistor is exposed. The RTD may be used in numerous applications and often provide a reasonably accurate, repeatable, and stable measure of temperature.
While RTD sensors have proven useful and successful in various prior art systems, various factors may affect the accuracy of the sensor. By way of background to certain of those factors, FIG. 1 illustrates a prior art RTD system 10 implemented in connection with a prior art analog-to-digital converter (ADC) 12, commercially available, for example, as the ADS1120 from Texas Instruments Incorporated (although others are also contemplated, such as different sizes, including the ADS1248, a 24-bit device). ADC 12 includes the various pins as indicated in the Figure around the perimeter of a device. ADC 12 also includes a switching multiplexer (MUX) 14 connected between four pins (AIN0, AIN1, AIN2, and AIN3) and two current sources IDAC1 and IDAC2, a programmable array amplifier (PGA) 16, and a low voltage pin AVSS. In the illustration of FIG. 1, and as shown by dashed lines, MUX 14 is switched to connect a current, I1, from source IDAC1 to pin AIN2 (shown therefore by parenthesis (IDAC1) at the pin) and to connect a current, I2, from source IDAC2 to pin AIN3 (shown therefore by parenthesis (IDAC2) at the pin). The outputs of PGA 16 are connected, as inputs to a 16-bit conversion block 18. Block 18 outputs to a filter block 20, which outputs a 16-bit data Code representative of the analog input voltage difference at pins AIN0 and AIN1, relative to a reference voltage difference between its respective positive and negative reference input pins, REFP0 and REFN0. The additional blocks illustrated of ADC 12 should be understood to one skilled in the art, presumed not needing of discussion for the current context, and are further described in the readily-available datasheet for the above-identified commercially available part, and such datasheet is hereby incorporated herein by reference.
RTD system 10 also includes an RTD sensor 22 connected to ADC 12. In the illustrated example, RTD sensor 22 is a 3-lead device, although as known in the art RTD sensors may include a different number of leads (e.g., two or four). RTD sensor 22 includes a temperature-dependent resistance RRTD, which is typically constructed of a length of thin coiled wire wrapped around a core, and where the wire material and, hence, the overall device, has a highly predictable correlation between temperature and resistance. Each of the three leads of sensor 22 also has an associated (and typically assumed equal) resistance, where such resistances are shown in FIG. 1 as RLEAD1, RLEAD2, and RLEAD3, where such wires, and their corresponding resistance, may include that included with the sensor as well as additional wire, if any, added to the sensor (e.g., by the end user). Resistance RLEAD1 is connected between a first terminal T1 of resistor RTD and a first sensor node 22N1, while resistance RLEAD2 is connected between a second terminal T2 of resistor RRTD and a second sensor node 22N2, and resistance RLEAD3 is connected between the second terminal T2 of resistor RRTD and a third sensor node 22N3. Node 22N1 is connected to the AIN2 pin of ADC 12 (to receive the current I1 from IDAC1), and node 22N2 is connected to the AIN3 pin of ADC 12 (to receive the current I2 from IDAC2). Node 22N3 is connected to a first terminal of a precision, low-drift reference resistor RREF, and the second terminal of reference resistor RREF is connected to ground.
Also connected to ADC 12 in RTD system 10 are filter circuits 24 and 26, where the capacitors therein are generally recommended to attenuate high-frequency noise components and the resistors provide part of the filtering aspect. Beyond this introduction, however, such components are not particularly germane to the present discussion. Additionally, ADC 12 as has positive analog power supply input pin AVDD connected to receive a fixed voltage (e.g., 3.3 V) along with a decoupling capacitor DC1 connected between that input and ground, and similarly ADC 12 as has positive digital power supply input pin DVDD connected to receive a fixed voltage (e.g., 3.3 V) along with a decoupling capacitor DC2 connected between that input and ground.
The operation of RTD system 10 is as follows. Current sources IDAC1 and IDAC2 are enabled to provide an equal amount of current I1=I2 (e.g., via programmable bits in the ADC configuration register). The two currents combine and that combined current (i.e., I1+I2) flows through reference resistor RREF, and the resulting voltage across resistor RREF is available for ADC 12 as the ADC reference voltage, VREF, as between pins REFP0 and REFN0. Thus, such measure should evaluate the voltage as shown in the following Equation 1:VREF=(I1+I2)*RREF  Equation 1where in Equation 1 any of the filter 26 resistors are assumed to be very small in a relative sense and, thus, the voltage drop across them is not limiting to the measurement accuracy. In the prior art, it is assumed that IDAC1 and IDAC2 are sufficiently matched, even across temperature, to provide equal amounts of current, again reiterating the programmed desire that I1=I2. Thus, Equation 1 may be re-written as the following Equation 2:VREF=(2I1)*RREF  Equation 2
To simplify the following discussion, the lead resistance values (RLEADx) are assumed to be zero. With this assumption, next the voltage, VRTD, is measured across resistor RRTD, as detected across input pins AIN0 and AIN1, in response to only the excitation of IDAC1 to provide I1. Thus, such measure should evaluate the voltage as shown in the following Equation 3:VRTD(I1)*RRTD  Equation 3
Assuming switches S1 and S2 are open, then PGA 16 internally amplifies the measured voltage by a gain, A, and conversion block 18 and filter block 20 thereby produce a corresponding digital (e.g., 16-bit) Code, representing the relationship of VRTD to VREF, according to the following Equations 4 through 5:
                    Code        ∝                                            V              RTD                        *            A                                V            REF                                              Equation        ⁢                                  ⁢        4            Substituting VRTD of Equation 3 in the numerator of Equation 4, and VREF of Equation 2 into the denominator of Equation 4, gives the following Equation 5:
                              Code          ∝                                                    (                                  I                  1                                )                            *                                                R                  RTD                                ·                A                                                                    (                                  2                  ⁢                                      I                    1                                                  )                            ⁢                              R                REF                                                    =                                            R              RTD                        ·            A                                2            ⁢                          R              REF                                                          Equation        ⁢                                  ⁢        5            
Equation 5 indicates that the output Code depends on the value of resistor RRTD, the PGA gain A, and the reference resistor RREF, but not on I1, I2 or VREF. The absolute accuracy and temperature drift of the excitation current therefore, with the assumptions provided, does not matter as long as I1=I2. In any event, from the preceding, and assuming A and RREF and constant, then at any measure of VRTD, a resultant Code corresponds to the value of RRTD (times some constant), and that value of RRTD may thus be processed to correspond to a temperature expected to cause such resistance, thereby providing an accurate temperature sensing function.
While the above approach has proven workable for various applications and by way of a discrete device, certain processes may result in higher temperature drifts in which case the assumption of I1=I2 does not provide sufficiently reliable results.
Given the preceding, the present inventors have identified improvements and alternatives to the prior art, as are further detailed below.